hmm unlike PICs where basically every revision is completely different, atmel managed not to make this a horrendous mess

see programming earlier PICs involves literally feeding the core instructions to execute over the ISP interface

@haskal ESPs are working similarly; it has a minimal UART ROM bootloader and you upload the second stage and the payload from a PC when you flash it

@uint8_t ok but the thing is this isn't a bootloader, the actual ISP hardware interface has a state machine where one of the commands (and the main way to configure stuff like addresses and sections to read from or write to) is literally "execute this PIC instruction on the core" and imo that is so unbelievably cursed

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