Here's my thoughts on what Unified Memory APU designers like Apple and AMD might be looking to next... With limited ability to add in PCIe lanes on the die, will they start using the Unified Memory as a Massive Mailbox?
M1's future
@jayblanc That's worth some pondering. ^_^ I could envisage the M1X, D1, or whatever they call the more "desktop" oriented machine's SoC being substantially larger - partially for a larger die with maybe 16 Firestorm and 4-6 Icestorm cores and double the memory controllers, but also for more RAM physical space to allow for greater max RAM at possibly double the memory bandwidth, and potentially such I/O controller(s).
Where the 16" MBP will land amidst the possibilities, only Apple knows, but I'm eager to find out. ^_^
re: M1's future
@porsupah I suspect they're hitting physical limits on how dense a ramchip they can fit on die. Hence my assumption that the future for Unified Memory APUs is discrete user-provisioned DIMM memory that is OS controlled and used as superfast swap.
re: M1's future
@porsupah Of note, the memory on die of the M1 isn't actually an Apple part, they're Samsung or Micron LPDDR4 parts. The largest LPDDR4 package currently produced is Samsung's 8GB. It'd need a significantly increased die size to add more than 16GB of memory.
re: M1's future
@jayblanc Is Samsung at 5nm now? Idly wondering if Apple could usher Samsung in to use their RAM designs on TSMC's 5nm, given they've basically booked that for a while. Though would the process shrink be enough? Maybe it's time to go vertical, though that seems to still be largely theoretical beyond, IIRC, some flash designs.
(As distinct from layering RAM on top of a SoC, which ISTR Apple's done with some of the A series, though I could be mistaken)
Reminds me, I should save that Anandtech deep dive into the M1 - that was a glorious geekfest. That OOO ROB! O.o
re: M1's future
@porsupah
https://blocksandfiles.com/2020/04/13/dram-is-stuck-in-a-10nm-process-trap/
Basic answer - Shrinking memory cell size also reduces it's capacitance. Since capacitance is what makes memory work, this means there's a physical limit on ram cell size. Without some fundamental new discoveries with semiconductor materials, memory is trapped at 10nm production.
re: M1's future
@porsupah Unless Samsung and Micron are keeping something secret, I haven't seen anything yet.
re: M1's future
@jayblanc Eek! I'd missed that. (Aware of the issue, but not that the brick wall had already been hit) Well, that's a pooper. Vertical it is, then, but has anyone actually succeeded with those in production yet?